1.Product Features
Support ITU-T G.984.2 GPON OLT C++ application
Single fiber bi-directional data links with symmetric 2.488Gbps Tx and 1.244Gbps Rx
1490nm continuous-mode transmitter with DFB LD
1310nm burst-mode receiver with APD-TIA
2-wire interface for integrated digital diagnostic Monitoring
Receiver RESET, Signal Detect, RSSI function indication (RESET, RX_SD, RSSI)
SFP package with SC/UPC receptacle optical interface
Single +3.3V power supply
Operation case temperature 0~70°C
RoHS6 compliance
Parameter |
Unit |
Min. |
Typical |
Max. |
Transmitter | ||||
TX Central Wavelength |
nm |
1480 |
1490 |
1500 |
Spectral Width (-20dB) |
nm |
1 |
||
Side Mode Suppression Ratio (SMSR) |
dB |
30 |
||
Mean Launched Power |
dBm |
4.5 |
10 |
|
Mean Launched Power (TX Off) |
dBm |
-45 |
||
Extinction Ratio |
dB |
8.2 |
||
Optical Return Loss Tolerance |
dB |
-12 |
||
Transmitter and dispersion Penalty |
dB |
1 |
||
Transmitter Mask(PRBS2 23 -1 & 2.488G) |
Compliant With ITU-T G.984.2 |
|||
Receiver | ||||
Receive Wavelength |
nm |
1290 |
1310 |
1330 |
Sensitivity(PRBS2 23 -1 & 1.244G,ER=10,BER<10 -10 ) |
dBm |
-30 |
||
Overload(PRBS2 23 -1 & 1.244G,ER=10,BER<10 -10 ) |
dBm |
-12 |
||
Receiver Burst Mode Dynamic Range |
dB |
15 |
||
Damage Threshold for Receiver |
dBm |
5 |
||
SD Assert Level |
dBm |
-33 |
||
SD De-assert Level |
dBm |
-45 |
||
SD Hysteresis |
dB |
0.5 |
6 |
|
WDM Filter isolation to 1550nm |
dB |
38 |
||
WDM Filter isolation to 1650nm |
dB |
35 |
||
Electrical Interface Characteristics | ||||
Data Input Swing Differential/TX |
mV |
200 |
- |
2000 |
Data Output Swing Differential/RX |
mV |
400 |
1600 |
|
Date Differential Impedance |
Ω |
90 |
100 |
110 |
LVTTL Output High |
V |
2.4 |
Vcc |
|
LVTTL Output Low |
V |
0 |
0.4 |
|
LVTTL Input High |
V |
2.0 |
Vcc+0.3 |
|
LVTTL Input Low |
V |
0 |
0.8 |
|
Timing Characteristics | ||||
Guard Time (Tg) |
ns |
25.6 |
||
Reset Pulse Width (Tr) |
ns |
12.8 |
||
Reset Delay (Trd) |
ns |
12.8 |
||
Receiver Preamble Time (Tp) |
ns |
140 |
||
SD Assert Time (TSDA) |
ns |
100 |
||
SD De-assert Time (TSDD) |
ns |
12.8 |
||
RSSI Trigger Delay (Ttd) |
ns |
25 |
||
RSSI Trigger Pulse Width (Tw) |
ns |
500 |
||
Internal I2C Delay (Twait) |
us |
500 |